Nov 16, 2017

New Germanium-Based Material Could Replace Silicon for Electronic

The old adage “what goes around comes around” is now being applied in electronics. Before silicon ruled the roost as the electronics material of choice, the first transistors were fashioned out of germanium.
Now researchers at Ohio State University (OSU) are bringing germanium back to electronics in a way that they believe could displace silicon. To achieve its new role the researchers have manipulated the germanium down into a one-atom-thick material that gives it a two-dimensional structure not unlike graphene, thereby joining a growing list of 2-D materials targeted for electronic applications.
 The researchers say that electrons conduct through their germanium-based material ten times faster than through silicon and five times faster than in traditional germanium.

Joshua Goldberger, assistant professor of chemistry at Ohio State, was attracted to the material because of the more than half century that has gone into characterizing and developing electronics around germanium, such as germanium MOSFETs.

“Most people think of graphene as the electronic material of the future,” Goldberger said in a press release. “But silicon and germanium are still the materials of the present. Sixty years’ worth of brainpower has gone into developing techniques to make chips out of them. So we’ve been searching for unique forms of silicon and germanium with advantageous properties, to get the benefits of a new material but with less cost and using existing technology.”

It is not an altogether novel idea. Researchers have attempted before to produce a stable 2-D structure from germanium—dubbed germanane. But in research that was published in the journal ACS Nano (“Stability and Exfoliation of Germanane: A Germanium Graphane Analogue”), Goldberger and his colleagues are the first to demonstrate how to do it successfully.

Germanium in its natural state forms into multi-layered crystal structures, and all previous attempts to strip it down to a single-atom layer has resulted in an unstable material. The Ohio State researchers overcame this by first placing calcium atoms between each layer of the germanium in its natural multi-layered state. They then dissolved the calcium with water. When the chemical bonds between the calcium atoms and the germanium were unattached, the researchers filled the empty bonding sites with hydrogen. It was at this point that the researchers were able to peel away stable one-atom thick layers from the germanium to create germanane.
With its new hydrogen-enhanced chemical structure, germanane is more stable than silicon. Unlike silicon, germanane will not oxidize in the presence of air or water.
So germanane beats silicon in electron conductivity and is not susceptible to oxidation. It also beats graphene in electronic applications because it has an inherent band gap and has 60 years of characterization for the electronics industry behind it.
I suspect that we are going to see a rash of papers talking about germanane now. And it should be interesting to see which 2-D material makes it into electronic applications first.
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Oct 29, 2017

The measured positive and negative magnetoresistance for n-type germanium at room temperature


Magnetoresistance (MR) for n-type germanium wafers by in-line-four-terminal method at room temperature are explored. Conspicuously, the variation of the measured MR as a function of applied current and voltage-terminal separation is observed. With a further increase of applied current, the measured MR initially increases, passes through a peak value at a certain current and then finally decreases. The measured MR increases with an increase of the value of voltage-terminal separation. The most important outcome of this study is the observation of negative MR for the smallest voltage-terminal separation of 2 µm, and the sign change of the measured MR can be achieved by magnetic fields. These interesting results may lead to an alternative approach to future magneto-electronic devices.
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Oct 23, 2017

Scientists discover unique thermoelectric properties in cesium tin iodide

A semiconductor that can beat the heat

Rattling structures of halide perovskites: cesium tin iodide (left) and cesium lead iodide (right). Credit: UC Berkeley

A newly discovered collective rattling effect in a type of crystalline semiconductor blocks most heat transfer while preserving high electrical conductivity - a rare pairing that scientists say could reduce heat buildup in electronic devices and turbine engines, among other possible applications.

A team led by scientists at the Department of Energy's Lawrence Berkeley National Laboratory (Berkeley Lab) discovered these exotic traits in a class of materials known as halide perovskites, which are also considered promising candidates for next-generation solar panels, nanoscale lasers, electronic cooling, and electronic displays.
These interrelated thermal and electrical (or "thermoelectric") properties were found in nanoscale wires of cesium tin iodide (CsSnI3). The material was observed to have one of the lowest levels of heat conductivity among materials with a continuous crystalline structure.
This so-called single-crystal material can also be more easily produced in large quantities than typical thermoelectric materials, such as silicon-germanium, researchers said.
"Its properties originate from the  itself. It's an atomic sort of phenomenon," said Woochul Lee, a postdoctoral researcher at Berkeley Lab who was the lead author of the study, published the week of July 31 in the Proceedings of the National Academy of Sciences journal. These are the first published results relating to the thermoelectric performance of this single crystal material.
Researchers earlier thought that the material's thermal properties were the product of "caged" atoms rattling around within the material's crystalline structure, as had been observed in some other materials. Such rattling can serve to disrupt heat transfer in a material.
"We initially thought it was atoms of cesium, a heavy element, moving around in the material," said Peidong Yang, a senior faculty scientist at Berkeley Lab's Materials Sciences Division who led the study.
Jeffrey Grossman, a researcher at the Massachusetts Institute of Technology, then performed some theory work and computerized simulations that helped to explain what the team had observed. Researchers also used Berkeley Lab's Molecular Foundry, which specializes in nanoscale research, in the study.
"We believe there is essentially a rattling mechanism, not just with the cesium. It's the overall structure that's rattling; it's a collective rattling," Yang said. "The rattling mechanism is associated with the crystal structure itself," and is not the product of a collection of tiny crystal cages. "It is group atomic motion," he added.
A semiconductor that can beat the heat
SEM images of suspended micro-island devices. Individual AIHP NW is suspended between two membranes. Credit: UC Berkeley

Within the material's crystal structure, the distance between atoms is shrinking and growing in a collective way that prevents heat from easily flowing through.

But because the material is composed of an orderly, single-crystal structure, electrical current can still flow through it despite this collective rattling. Picture its electrical conductivity is like a submarine traveling smoothly in calm underwater currents, while its thermal conductivity is like a sailboat tossed about in heavy seas at the surface.
Yang said two major applications for thermoelectric materials are in cooling, and in converting heat into electrical current. For this particular cesium tin iodide material, cooling applications such as a coating to help cool electronic camera sensors may be easier to achieve than heat-to-electrical conversion, he said.
A challenge is that the material is highly reactive to air and water, so it requires a protective coating or encapsulation to function in a device.
Cesium tin iodide was first discovered as a semiconductor material decades ago, and only in recent years has it been rediscovered for its other unique traits, Yang said. "It turns out to be an amazing gold mine of physical properties," he noted.
To measure the thermal conductivity of the material, researchers bridged two islands of an anchoring material with a cesium tin iodide nanowire. The nanowire was connected at either end to micro-islands that functioned as both a heater and a thermometer. Researchers heated one of the islands and precisely measured how the nanowire transported heat to the other island.
They also performed scanning electron microscopy to precisely measure the dimensions of the nanowire. They used these dimensions to provide an exacting measure of the material's thermal conductivity. The team repeated the experiment with several different nanowire materials and multiple nanowire samples to compare thermoelectric properties and verify the  measurements.
"A next step is to alloy this (cesium tin iodide) material," Lee said. "This may improve the thermoelectric properties."
Also, just as computer chip manufacturers implant a succession of elements into silicon wafers to improve their electronic properties - a process known as "doping" - scientists hope to use similar techniques to more fully exploit the thermoelectric traits of this semiconductor material. This is relatively unexplored territory for this class of , Yang said.
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Oct 20, 2017

Rubicon Granted Asymmetrical Wafer Configuration Patent

Rubicon has been granted its "Asymmetrical Wafer Configurations and Method for Creating the Same,” U.S. Patent No. 8,389,099 by the United States Patent and Trademark Office (USPTO).

The patent covers the creation of visual and tactile indicators to make sapphire wafers asymmetric according to their crystalline orientation.

Sapphire wafers have a specific orientation that is invisible to the naked eye.

Rubicon has developed a simple and elegant process to make wafers appear asymmetrical via visual or tactile inspection.

This is important as LED and semiconductor manufacturers process sapphire wafers using specific crystalline orientations.
Rubicon maintains this patent will help manufacturers in the LED and SoS / RFIC industries eliminate costly and unnecessary steps to determine orientation of sapphire wafers during processing, such as X-ray crystallography.

Epitaxy-ready wafers have either an orientation flat or an orientation notch, but this provides insufficient information. One problem is that the wafer could be flipped front-to-back and still look the same yet be unusable in that state crystallographically.

Only through repeated X-ray inspections could one ensure that no wafers are reversed. If the wafers are made asymmetrical, operators at each stage of production can verify surface orientation quickly and economically, and will be confident that the wafers have been handled correctly.

Rubicon’s patent demonstrates several different solutions for making sapphire wafers asymmetric.

One scenario is a rounded corner on the orientation flat or notch which allows a user to easily determine that the wafer has not been reversed. In another solution, both corners of the flat are rounded to different radii.

These differences are enough to determine orientation by touch or visual inspection. The technique can be applied to other substrates including silicon, silicon oxide, AlN, germanium, SiC, GaAs, GaP, GaN, and amorphous analogues.

“This new patent demonstrates our ongoing commitment to refine our products for our customers and deliver innovations that deliver real value,” says Raja M. Parvez, President and CEO of Rubicon Technology. “For Rubicon’s customers in the LED and SoS / RFIC markets, the crystal orientation is a critical factor in their manufacturing processes. This patent provides a simple and elegant solution to eliminating costly mistakes in the processing of sapphire wafers."

"It underscores our dedication to not only provide high quality sapphire wafers, but to provide our customers with added value to lower the total cost of LED and RF solutions,” he adds.


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Sep 24, 2017

Scientists demonstrated 1.3μm submilliamp threshold quantum dot micro-lasers on Si

Scientists demonstrated 1.3 μm submilliamp threshold quantum dot micro-lasers on Si
Schematic of the electrically pumped quantum dot micro-ring laser. Credit: Department of Electronic and Computer Engineering, HKUST

Decades ago, the Moore's law predicted that the number of transistors in a dense integrated circuit doubles approximately every two years. This prediction was proved to be right in the past few decades, and the quest for ever smaller and more efficient semiconductor devices have been a driving force in breakthroughs in the technology.

With an enduring and increasing need for miniaturization and large-scale integration of photonic components on the  platform for data communication and emerging applications in mind, a group of researchers from the Hong Kong University of Science and Technology and University of California, Santa Barbara, successfully demonstrated record-small electrically pumped micro-lasers epitaxially grown on industry standard (001) silicon substrates in a recent study. A submilliamp threshold of 0.6 mA, emitting at the near-infrared (1.3?m) was achieved for a micro- with a radius of 5 μm. The thresholds and footprints are orders of magnitude smaller than those previously reported lasers epitaxially grown on Si.

Their findings were published in the prestigious journal Optica on August 4, 2017 (DOI: 10.1364/OPTICA.4.000940).

"We demonstrated the smallest current injection QD lasers directly grown on industry-standard (001) silicon with  and high temperature stability," said Kei May Lau, Fang Professor of Engineering and Chair Professor of the Department of Electronic & Computer Engineering at HKUST.

"The realization of high-performance micron-sized lasers directly grown on Si represents a major step toward utilization of direct III-V/Si epitaxy as an alternate option to wafer-bonding techniques as on-chip silicon light sources with dense integration and low power consumption."

The two groups have been collaborating and has previously developed continuous-wave (CW) optically-pumped micro-lasers operating at room temperature that were epitaxially grown on silicon with no germanium buffer layer or substrate miscut. This time, they demonstrated record-small electrically pumped QD lasers epitaxially grown on silicon. "Electrical injection of micro-lasers is a much more challenging and daunting task: first, electrode metallization is limited by the micro size cavity, which may increase the device resistance and thermal impedance; second, the whispering gallery mode (WGM) is sensitive to any process imperfection, which may increase the optical loss," said Yating Wan, a HKUST PhD graduate and now postdoctoral fellow at the Optoelectronics Research Group of UCSB.

"As a promising integration platform, silicon photonics need on-chip laser sources that dramatically improve capability, while trimming size and power dissipation in a cost-effective way for volume manufacturability. The realization of high-performance micron-sized lasers directly grown on Si represents a major step toward utilization of direct III-V/Si epitaxy as an alternate option to wafer-bonding techniques," said John Bowers, Deputy Chief Executive Officer of AIM Photonics.

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Sep 5, 2017

Study of the impact of doping concentration and Schottky barrier height on ohmic contacts to n-type germanium


Ohmic contacts to n-type germanium have been fabricated and a very low specific contact resistance has been obtained using laser annealing activation of the implanted dopant atoms. A model is presented to understand the current mechanism at the metal/germanium interface, and to study the impact of the doping concentration and Schottky barrier height on the specific contact resistance of the ohmic contacts.

Graphical abstract

Unlabelled figure


Ohmic contacts

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Aug 13, 2017

Modeling of dislocation dynamics in germanium Czochralski growth


Comprehensive computer simulation of 4-in. Czochralski germanium growth was done.
Alexander-Haasen model of dislocation density showed reasonable predictions.
Factors of dislocation density multiplication rate were considered.
Two approaches of dislocation transfer at the melt/crystal interface were employed.


Obtaining very high-purity germanium crystals with low dislocation density is a practically difficult problem, which requires knowledge and experience in growth processes. Dislocation density is one of the most important parameters defining the quality of germanium crystal.
In this paper, we have performed experimental study of dislocation density during 4-in. germanium crystal growth using the Czochralski method and comprehensive unsteady modeling of the same crystal growth processes, taking into account global heat transfer, melt flow and melt/crystal interface shape evolution. Thermal stresses in the crystal and their relaxation with generation of dislocations within the Alexander-Haasen model have been calculated simultaneously with crystallization dynamics. Comparison to experimental data showed reasonable agreement for the temperature, interface shape and dislocation density in the crystal between calculation and experiment.


A1. Dislocation density
A1. Computer modeling
A2. Czochralski crystal growth
B1. Germanium
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Aug 9, 2017

Imec demonstrates 50GHz Ge waveguide electro-absorption modulator

At this week's OFC 2015, the largest global conference and exposition for optical communications, nanoelectronics research center imec, its associated lab at Ghent University (Intec), and Stanford University have demonstrated a compact germanium (Ge) waveguide electro-absorption modulator (EAM) with a modulation bandwidth beyond 50GHz. Combining state-of-the-art extinction ratio and low insertion loss with an ultra-low capacitance of just 10fF, the demonstrated EAM marks an important milestone for the realization of next-generation silicon integrated optical interconnects at 50Gb/s and beyond.
Imec demonstrates 50GHz Ge waveguide electro-absorption modulator

Future chip-level optical interconnects require integrated optical modulators with stringent requirements for modulation efficiency and bandwidth, as well as for footprint and thermal robustness. In the presented work, imec and its partners have improved the state-of-the-art for Ge EAMs on Si, realizing higher modulation speed, higher modulation efficiency and lower capacitance. This was obtained by fully leveraging the strong confinement of the optical and electrical fields in the Ge waveguides, as enabled in imec's 200mm Silicon Photonics platform. The EAM was implemented along with various Si waveguide devices, highly efficient grating couplers, various active Si devices, and high speed Ge photodetectors, paving the way to industrial adoption of optical transceivers based on this device.

"This achievement is a milestone for realizing  optical transceivers for datacom applications at 50Gb/s and beyond," stated Joris Van Campenhout, program director at imec. "We have developed a modulator that addresses the bandwidth and density requirements for future ."

Companies can benefit from imec's Silicon Photonics platform (iSiPP25G) through established standard cells, or by exploring the functionality of their own designs in Multi-Project Wafer (MPW) runs. The iSiPP25G technology is available via ICLink services and MOSIS, a provider of low-cost prototyping and small volume production services for custom ICs.

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Aug 1, 2017

Nanopore morphology in porous GaN template and its effect on the LEDs emission


GaN grown on sapphire is electrochemically etched in HF and in KOH. Etching in HF results in a network of nanopillars while that etched in KOH results in a network of pores. The higher density of voids from the network of pores shows the highest strain relaxation for a 1.2 µm thick GaN overgrown on the porous templates. In general, a light-emitting diode (LED) on the porous templates gives about 1.5 times higher intensity and a spectral envelop shift towards the red due to a higher In incorporation. The higher intensity is attributed to enhanced light extraction due to light scattering at the voids formed from the pores and improved material quality with dislocation reduction. The formation of larger overgrowth GaN islands which merges to give a continuous GaN film over the porous template reduced the dislocation density and also accounted for higher strain relaxation for the growth of the quantum dots (QDs) and quantum well layers. This reduced the extent of peak shift of LEDs grown on porous GaN template and improved its performance.
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Germanium-based photonics offer promise for novel sensors and faster internet

Mid-infrared light, which has a wavelength longer than visible light but shorter than microwaves, has many important applications in remote sensing and communication technologies. Researchers in Japan have demonstrated the successful operation of several new photonic components that can effectively guide the passage of mid-infrared light. The research may lead to a faster internet and sensitive detectors for important molecules like carbon dioxide. The team presents their results at the Optical Fiber Communication Conference and Exhibition (OFC), held March 20-24 in Anaheim, California, USA.

The researchers built the new components from the material  (Ge). Like silicon, which is commonly used in conventional near-infrared photonics, germanium is a group IV semiconductor, which means it is in the same column of the periodic table and has similar electrical properties. Germanium has several properties that make it particularly well-suited to transmit and guide mid-infrared , said Jian Kang, a Ph.D. candidate in the Takagi-Takenaka group in the Department of Electrical Engineering and Information Systems, University of Tokyo, Japan.

Germanium has high optical transparency in the mid-infrared range so mid-infrared light can easily pass through it. Compared to silicon, germanium has a number of other optically interesting properties. These include a higher refractive index, which means light passes more slowly through it. Germanium also has a larger third-order nonlinearity, an optical effect that can be exploited to, for example, amplify or self-focus beams of light. It has a stronger free-carrier effect, which means charge carrying electrons and holes in the material can help modulate light. Germanium also has a stronger thermo-optic effect than silicon, which means the refractive index can be more easily controlled with temperature.

"These properties could make Ge-based devices show higher performance or even realize new functionalities in the mid-infrared," said Kang. Furthermore, recent progress on lasers made from strained-Ge and GeSn-based materials make germanium a promising material for integrating both the light producing and light steering components on the same photonic chip, Kang said.

Kang and his colleagues designed and tested several fundamental photonic waveguide components made from germanium, including grating couplers, MMI couplers, and micro-ring resonators. Grating couplers are used to couple light efficiently from free space into a waveguide, and vice versa, MMI couplers are used as routers or couplers for light signal processing in the waveguide, and micro-ring resonators are used to filter certain wavelengths of light passing through.

The biggest challenge the team faced was controlling the device fabrication process, including the polishing and etching of the germanium wafer, Kang said.

"Currently, the Ge device performance may be not as good as state-of-the-art Si-based ones, because the study of Ge-based photonic components for mid-infrared is quite new and there remain many issues in the optimization of the fabrication process," he said. "Nevertheless, we believe that Ge-based devices have intrinsic advantages."

Germanium's attractive optical properties in the mid-infrared mean that an optimized Ge waveguide could be more compact than a similar silicon device, meaning more chips could fit into the same space, Kang noted.

Many important molecules, such as carbon dioxide, absorb and emit light in the mid-infrared when they change vibrational states, so mid-infrared photonics could serve as the basis for new sensors. Monitoring and detecting carbon emissions, hidden explosives, and health conditions like liver disease and cancer are all possible with Ge-based sensors, Kang said.

Ge-based photonic chips also have the potential to increase the bandwidth of optical fiber communications. "In a general sense, it can make the internet much faster," Kang said.

For now, Kang and his colleagues are working on improving their fabrication techniques. Afterwards they plan to build more devices, such as optical switches, and to integrate a GeSn laser and Ge waveguide devices onto the same chip.

More information: Presentation: "Design and Characterization of Ge Passive Waveguide Components on Ge-on-Insulator for Mid-Infrared Photonics," by Jian Kang, Xiao Yu, Mitsuru Takenaka and Shinichi Takagi.

Provided by: Optical Society of America 

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Jul 26, 2017

The impact of polishing on germanium-on-insulator substrates


We prepared germanium-on-insulator (GOI) substrates by using Smart-Cut and wafer bonding technology. The fabricated GOI is appropriate for polishing due to a strong bonding strength (2.4 MPa) and a sufficient bonding quality. We investigated mechanical polishing and chemical—mechanical polishing (CMP) systematically, and an appropriate polishing method—mechanical polishing combined with CMP—is obtained. As shown by AFM measurement, the RMS of GOI after polishing decreased to 0.543 nm. And the Ge peak profile of the XRD curve became symmetric, and the FWHM is about 121.7 arcsec, demonstrating a good crystal quality.
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Jul 19, 2017

A thin transition film formed by plasma exposure contributes to the germanium surface hydrophilicity


Plasma treatment and 10% NH4OH solution rinsing were performed on a germanium (Ge) surface. It was found that the Ge surface hydrophilicity after O2 and Ar plasma exposure was stronger than that of samples subjected to N2 plasma exposure. This is because the thin GeO x film formed on Ge by O2 or Ar plasma is more hydrophilic than GeO x N y formed by N2 plasma treatment. A flat (RMS < 0:5 nm) Ge surface with high hydrophilicity (contact angle smaller than 3°) was achieved by O2plasma treatment, showing its promising application in Ge low-temperature direct wafer bonding.
Keywords:germanium wafers,
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Jul 11, 2017

Thin film germanium on silicon created via ion implantation and oxide trapping


We present a novel process for integrating germanium with silicon-on-insulator (SOI) wafers. Germanium is implanted into SOI which is then oxidized, trapping the germanium between the two oxide layers (the grown oxide and the buried oxide). With careful control of the implantation and oxidation conditions this process creates a thin layer (current experiments indicate up to 20-30nm) of almost pure germanium. The layer can be used potentially for fabrication of integrated photo-detectors sensitive to infrared wavelengths, or may serve as a seed for further germanium growth. Results are presented from electron microscopy and Rutherford back-scattering analysis, as well as preliminary modelling using an analytical description of the process.
Keywords:germanium,SOI,silicon-on-insulator (SOI),
Source:  iopscience
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Jul 7, 2017

A review of thermal processing in the subsecond range: semiconductors and beyond


Thermal processing in the subsecond range comprises modern, non-equilibrium annealing techniques which allow various material modifications at the surface without affecting the bulk. Flash lamp annealing (FLA) is one of the most diverse methods for short-time annealing with applications ranging from the classical field of semiconductor doping to the treatment of polymers and flexible substrates. It still continues to extend its use to other material classes and applications, and is becoming of interest for an increasing number of users. In this review we present a short, but comprehensive and consistent picture of the current state-of-the-art of FLA, sometimes also called pulsed light sintering. In the first part we take a closer look at the physical and technological background, namely the electrical and optical specifications of flash lamps, the resulting temperature profiles, and the corresponding implications for process-relevant parameters such as reproducibility and homogeneity. The second part briefly considers the various applications of FLA, starting with the classical task of defect minimization and ultra-shallow junction formation in Si, followed by further applications in Si technology, namely in the fields of hyperdoping, crystallization of thin amorphous films, and photovoltaics. Subsequent chapters cover the topics of doping and crystallization in Ge and silicon carbide, doping of III–V semiconductors, diluted magnetic semiconductors, III–V nanocluster synthesis in Si, annealing of transparent conductive oxides and high-k materials, nanoclusters in dielectric matrices, and the use of FLA for flexible substrates.
Source:  iopscience
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Jun 27, 2017

Silicon and germanium nanowire electronics: physics of conventional and unconventional transistors


Research in the field of electronics of 1D group-IV semiconductor structures has attracted increasing attention over the past 15 years. The exceptional combination of the unique 1D electronic transport properties with the mature material know-how of highly integrated silicon and germanium technology holds the promise of enhancing state-of-the-art electronics. In addition of providing conduction channels that can bring conventional field effect transistors to the uttermost scaling limits, the physics of 1D group IV nanowires endows new device principles. Such unconventional silicon and germanium nanowire devices are contenders for beyond complementary metal oxide semiconductor (CMOS) computing by virtue of their distinct switching behavior and higher expressive value. This review conveys to the reader a systematic recapitulation and analysis of the physics of silicon and germanium nanowires and the most relevant CMOS and CMOS-like devices built from silicon and germanium nanowires, including inversion mode, junctionless, steep-slope, quantum well and reconfigurable transistors.
Keywords:1D group-IV;complementary metal oxide semiconductor (CMOS) ;silicon and germanium nanowires;semiconductor 
Source: iopscience

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