Frequently, when growing III–V semiconductors on germanium substrates, unexpected
differences between nominally identical substrates are encountered. Using
atomic force microscopy (AFM), we have
analysed a set of germanium substrates sharing the same specifications. The
substrates come from the same vendor but different results come about in terms
of the morphology of the epilayers produced by the same epitaxial routine (i.e.substrate W1 produced
epilayers with good morphology while substrate WXproduced epilayers with defects). The morphological
analysis has been carried out on (a) epiready substrates; (b) samples after a
high-temperature bake at 700 °C; and (c) on the samples after a hydride (PH3) annealing at 640 °C. In the two first stages all
substrates
(both W1 and WX) show the
same good morphology with RMS roughness below 3 Å in all cases. It is in the third stage (annealing in PH3) that
the morphology degrades and the differences between the samples become
apparent. After phosphine exposure at 640 °C, the RMS roughness of both
substrates approximately doubles, and their surface appears as full of peaks
and valleys on the nanometre scale. Despite the general appearance of the
samples being similar, a careful analysis of their surface reveals that the
substrates that produce bad morphologies (WX) show higher peaks, and some of
their roughness parameters, namely, surface kurtosis and the surface skewness,
are considerably degraded.
The diffusion rate of Co in Ge is found to be as fast as 2×10-6cm2s-1
at 900 °C, whereas the Co solubility comes close to 1×1016cm-3
at the same temperature. Based on these properties and its acceptor activity,
Co may cause serious contamination problems during the fabrication of Ge-based
electronic devices. In contrast to an early radiotracer study, we observe
common diffusion profiles of complementary error function type, which are
indicative of a constant diffusivity depending only on temperature. A
preliminary analysis of the data points to the dissociative diffusion mechanism
involving interstitial–substitutional exchange via vacancies. However, in
contrast to Cu, which migrates via the vacancy-controlled mode of the
dissociative mechanism, the diffusion of Co may be rate-limited by the
transport properties of its interstitial modification (Coi).
Source: Physica B: Condensed Matter
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study of cobalt diffusion and solubility in electronic-grade germanium wafers,
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This
paper investigates the slicing of germanium wafers from single crystal,
gallium-doped ingots using wire electrical discharge machining. Wafers with a
thickness of 350 μm and a diameter of 66 mm were cut using 75 and
100 μm molybdenum wire. Wafer characteristics resulting from the process
such as the surface profile and texture are analyzed using a surface profiler
and scanning electron microscopy. Detailed experimental investigation of the
kerf measurement was performed to demonstrate minimization of material wastage
during the slicing process using WEDM in combination with thin wire diameters.
A series of timed etches using two different chemical etchants were performed
on the machined surfaces to measure the thickness of the recast layer. Cleaning
of germanium wafers along with its quality after slicing is demonstrated by
using Raman spectroscopy.
Source:
Journal of Materials Processing Technology
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germanium wafers machined by wire electrical discharge machining, please visit
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We present the fabrication and characterization of ultra thin
and relatively thick SiGe-On-Insulator wafers with different Ge contents
prepared by Ge condensation technique. The fabrication procedures as well as
the structural analysis are detailed. The electrical properties of advanced
strained SiGe-On-Insulator (SGOI) and relaxed Germanium-On-Insulator (GeOI)wafers were investigated using the Pseudo-MOSFET method and then compared with
Silicon-On-Insulator (SOI) and strained Silicon-On-Insulator (sSOI) structures.
GeOI wafers with 10-nm and 100-nm film thickness show exceptionally high hole
mobility as compared to both SOI and sSOI structures. The hole mobility can
reach 400 cm2/V s.
It is found that the mobilities for holes and electrons vary in opposite
directions as the Ge fraction is increased. The Ge content also impacts the
threshold and flat-band voltages.
The overall resource requirements for the production of
germanium wafers for III–V multi-junction solar cells applied in concentrator
photovoltaics have been assessed based on up to date process information. By
employing the cumulative energy demand (CED) method and the cumulative exergy
extraction from the natural environment (CEENE) method the following resources
have been included in the assessment: fossil resources, nuclear resources,
renewable resources, land resources, atmospheric resources, metal resources,
mineral resources and water resources. The CED has been determined as
216 MJ and the CEENE has been determined as 258 MJex.In addition partial
energy and exergy payback times have been calculated for the base case, which
entails the installation of the high concentration photovoltaics (HCPVs) in the
Southwestern USA, resulting in payback times of around 4 days for the germanium
wafer production. Due to applying concentration technology the germanium wafer
accounts for only 3% of the overall resource consumption of an HCPV system. A
scenario analysis on the electricity input to the wafer production and on the
country of installation of the HCPV has been performed, showing the importance
of these factors on the cumulative resource consumption of the wafer production
and the partial payback times.
Highlights
• The Ge-wafer production for
concentrator solar cells was inventoried and assessed. • The cumulative energy
demand was determined as 216 MJ wafer−1.
•
The cumulative exergy extraction from the natural environment was 258 MJex wafer−1.
•
System installation in the SW USA results in Ge-wafer payback times of ca. 4
days.
•
The Ge-wafer represents only 3% of the concentrator PV system resource
requirements.
Graphene has been predicted to play
a role in post-silicon electronics due to the extraordinary carrier mobility.
Chemical vapor deposition of graphene on transition metals has been considered
as a major step towards commercial realization of graphene. However,
fabrication based on transition metals involves an inevitable transfer step
which can be as complicated as the deposition of graphene itself. By
ambient-pressure chemical vapor deposition, we demonstrate large-scale and
uniform depositon of high-quality graphene directly on a Ge substrate which is
wafer scale and has been considered to replace conventional Si for the next
generation of high-performance metal-oxide-semiconductor field-effect transistors
(MOSFETs). The immiscible Ge-C system under equilibrium conditions dictates
graphene depositon on Ge via a self-limiting and surface-mediated process
rather than a precipitation process as observed from other metals with high
carbon solubility. Our technique is compatible with modern microelectronics
technology thus allowing integration with high-volume production of
complementary metal-oxide-semiconductors (CMOS).
Graphene
is one-atom-thick planar film of sp2-bonded carbon atoms densely
arranged in a honeycomb crystal lattice. It has attracted enormous scientific
and technological interest due to the outstanding electrical, mechanical, and
chemical propertiesas well as
large potential in a multitude of applications. Since the first micromechanical
exfoliation of highly oriented pyrolytic graphite (HOPG) in 2004, many
approaches have been pursued in graphene synthesis, including conversion of SiC
to graphene via sublimation of silicon atoms at high temperature, chemical
production of graphene from graphite oxide, and chemical vapor deposition (CVD)
on transition metals. In particular, CVD techniques using Cu or Ni as catalysts
are promising in the synthesis of large-area, near-perfect, and transferable
graphene. However, in order to integrate with solid-state electronics and
integrated circuits (IC), CVD conducted using a transition metal as the
catalyst involves an inevitable transfer step which may introduce defects,
impurities, wrinkles, and cracks, thus potentially degrading the performance of
graphene-based devices. To bypass the transfer process, direct graphene growth
on nonmetal materials such as silicon oxideand hexagonal boron
nitridehas been recently demonstrated. Without the metal catalyst,
graphene fabrication is usually quite slow and the ultimate domain size of the
graphene is also limited. For instance, on a hexagonal boron nitride substrate,
single-crystal graphene domains with a lateral size of only 1 μm are obtained and graphene domains less than 1 μm are achieved on silicon oxide. As emphasized in the recent
review by K. S. Novoselov, the game-changing breakthrough is graphene growth on
arbitary surfaces, especially on semiconductor materials in order to promote
better compatibility with modern microelectronics. Up to now, none of the
approaches demonstrated previously involve direct deposition of graphene onto
the substrate of interest, i.e., the semiconductor substrate, which is the bulk
materials for complementary metal-oxide-semiconductor (CMOS) devices. Ge is
considered as a promising channel material to replace conventional silicon in
next-generation high-performance metal-oxide-semiconductor field-effect
transistors (MOSFETs) due to its higher carrier mobility and process
compatibility with Si-based microelectronics processes. In fact, Ge is both a
semiconductor and a semi-metal and hence, similar to transition metals, Ge may
render CVD of graphene possible, but it has not been demonstrated so far.
We report
here direct fabrication of large-area graphene on Ge without a metal foil by
CVD (Methods;Supplementary
Figure S1). Under the optimal conditions, homogeneous monolayered graphene with
superior quality can be produced on the Ge wafer. This process obviates the
need for the formerly inevitable transfer step in the production of graphene with
a large area. Furthermore, the resulting graphene-on-Ge(GOG) substrate may be
used directly to fabricate Ge-based devices for high-speed electronic and
optoelectronic applications based on conventional microelectronics technology.
Results
Condition optimization for
graphene growth
Figure 1(a)shows
the Raman spectra acquired from the graphene films deposited at different
temperatures. At 800°C or lower, the typical features of graphene, i.e., the 2D
peak at ~2710 cm−1and the G peak at ~1580 cm−1,
appear. However, a large defect related D peak emerges near 1350 cm−1with a peak intensity ratio of ID/IG≈1.8, indicating the presence of
defects in the graphene layer. The crystalline quality is gradually improved
with increasing temperature from 800°C to 910°C as evidenced by the attenuation
in the D peak. The peak intensity ratios ID/IGdecrease
obviously from 1.8 to 0.04 and no appreciable D peak is observed when the
growth temperature is increased to 910°C. The improved crystalline quality is
confirmed by selected area electron diffraction (SAED). The sample deposited at
800°C shows SAED pattern inFigure
1(b)with a diffuse diffraction
ring pattern typical of a disordered structure. With increasing growth
temperature, the SAED pattern of the graphene film changes from a ring pattern
to a spot pattern, as shown inFigure
1(c–e)and the optimal
temperature determined experimentally is 910°C.
Figure 1: Structural and crystalline quality
characterization of graphene films grown at various temperatures.
(a)Raman spectra of graphene films deposited on Ge under the optimal
conditions at different temperatures. (b–e) SAED patterns of graphene films
deposited directly onto Ge at 800°C, 850°C, 880°C, and 910°C.
Figure
2(a)depicts the Raman spectra of
the graphene films deposited on Ge by varying the H2to CH4gas ratios. The temperature is set at
the optimized one of 910°C and the time is 100 min to ensure complete
coverage of graphene. As the ratio is changed from 50:0.1 (sccm) to 50:3
(sccm), the defect related D peak emerges and the peak intensity increases
rapidly. Furthermore, the FWHM of the 2D peak increases gradually from
30 cm−1to
65 cm−1(as shown
inFigure 2(c)) and the 2D to G
peak ratio changes from 1.3 to 0.3. Considering that many factors can affect
the Raman spectra of graphene, it appears that the graphene films grow from one
to several layers. To determine the thickness, the transmittance at 550 nm
is obtained from the graphene films transferred onto glass slides and the
results are presented inFigure
2(b). The optical transmittance diminishes gradually as the H2/CH4flow ratio is varied from 50:0.1 to
50:3, supplying evidence that the graphene films become thicker. At a flow rate
ratio of 50:0.1, a high transparency of 97.51% is observed. Considering an
absorbance of ~2.3% for an individual graphene layer, the graphene film can be
inferred to have only one layer. When the H2:CH4ratio is changed to 50:3, the
transmittance drops to 96.20% and the graphene film is composed of several
layers. The number of graphene layers is determined by the amount of
hydrocarbon gas and in addition, the amount of hydrogen is critical to the
graphene layer number since hydrogen balances the production of reactive
hydrocarbon radicals and etching of graphite during CVD. If the H2/CH4ratio is 50:3, etching becomes much
slower than the formation of graphene leading to the formation of multi-layered
graphene. The optimal H2/CH4ratio to produce monolayered graphene
determined experimentally is 50:0.1.
Figure 2: Structural and optical
characterization of graphene films grown at different H2:CH4ratios.
(a)Raman spectra of graphene films deposited on Ge under the optimal
conditions using different H2:CH4flow ratios. (b) Optical
transmittance spectra of the transferred graphene films deposited using
different H2:CH4ratios.
(c) FWHM of the 2D peak and transmittance as a function of H2:CH4ratios.
The growth of homogeneous
monolayered graphene and its characterization
Using the optimal conditions for the
growth of monolayered graphene as described above, graphene was deposited on Ge
substrates at 910°C with a H2to CH4flow rate ratio of 50:0.1 (sccm) for
100 min in an ambient-pressure CVD system.Figure 3(a)depicts the representative Raman
spectrum of the as-deposited graphene. The defect-related D peak is strongly
suppressed, implying that the graphene film has high quality comparable to that
of exfoliated graphene. Furthermore, as shown in the inset ofFigure 3(a), the symmetric 2D peak
with a FWHM of ~30 cm−1can be well fitted by a single
Lorentzian curve providing evidence of monolayered graphene. To determine the quality, uniformity, and thickness
of the graphene films deposited on a large-scale on Ge, Raman mapping of the 2D
to G peak intensity ratio over a 15 μm × 15 μm area with a
spot size of 1 μm and a step size of 1 μm is performed,
as shown inFigure 3(b). The I2D/IGratio is quite uniform over the region
investigated and the I2D/IGis
in the range of 1–1.5, indicating complete monolayer graphene coverage in the
scanned area. The excellent uniformity is also exhibited across large area as
1 cm × 1 cm (Supplementary Figure S2).Figure 3(c)shows the representative atomic force
microscopy (AFM) image of the graphene film transferred from Ge onto
300 nm SiO2/Si. A uniform height of
1.1 nm also suggests that the graphene film is monolayered. The monolayer
feature and high crystallinity of the graphene are also confirmed by
transmission electron microscopy (TEM) and SAED, as shown inFigure 3(d). The suspended graphene
films on the TEM grids are continuous over a large area and the high-resolution
TEM image randomly taken from numerous graphene film edges reveals that the
as-grown graphene is monolayered. The SAED pattern of the graphene films is
displayed in the inset ofFigure
3(d). Only one set of hexagonal diffraction pattern is observed and a single
crystalline lattice structure can be inferred.
(a)Raman spectrum of graphene on Ge substrate. The insert shows the FWHM and
the Lorentzian fitting of 2D peak. (b) Two-dimensional Raman mapping of the I2D/IG peak intensity ratio obtained from the
graphene deposited on Ge (15 μm × 15 μm region with the step size of
1 μm). (c) Contact -mode AFM image of a graphene film transferred on SiO2 showing the monolayered feature and
wrinkles. (d) TEM image and SAED pattern revealing the high crystalline quality
of the graphene and HR-TEM image showing that the graphene is monolayered. The
scale bar in the HR-TEM image is 3 nm.
Discussion
To
elucidate the mechanism, graphene films were deposited on Ge for different
periods of time under the optimal conditions. As shown in Figure 4(a), as
the deposition time is increased, the defect-related D peak disappears
gradually and no appreciable D peak is observed when the time is 100 min.
However, the Raman spectra obtained from the graphene samples deposited for
120 min or longer are similar to that acquired from the sample deposited
for 100 min (not shown here), implying that the growth process of graphene
on Ge is self-limited. The attenuation in the D peak is believed to be
attributed to the decrease in the domain edges in expanded graphene domains.
Expansion of graphene domains is vividly exhibited by the color-coded intensity
mapping of the 2D peak over an 15 × 15 μm2 area with a
spot size of 1 μm and step size of 1 μm, as shown in Figures
4(b–e). The green regions correspond to graphene patches and the dark regions
represent the bare Ge surface. In the initial stage of graphene deposition, the
size of the graphene patch is relatively small, and so there is a large number
of edge defects relative to the domain of graphene, thereby leading to the
remarkable D peak in the Raman spectra. When the deposition time is increased
from 40 min to 100 min, the graphene patches grow in two-dimension islands
due to excess carbon atoms and finally merge together to form a continuous
film, as illustrated in Figure 4(f).
Therefore, the contribution from the edge of the graphene domain can be
neglected and the corresponding D peak is scarcely observed.
Figure 4: Characterization of graphene grown on Ge substrates for
different durations and illustration of graphene growth evolution.
(a)Raman spectra of graphene films deposited on Ge under optimal conditions
for different time. (b–e) Color-coded Raman mapping of the 2D peak intensity
images of graphene as a function of deposition time. The green features are
graphene domains and the dark regions represent the bare Ge surface. The scale
bar is 2 μm. (f) Schematic illustration of evolution of the graphene films on Ge
for different deposition time.
Nickel
and copper are two representative transition metals which have been observed to
produce relatively large-scale graphene films by CVD. Graphene films deposited
on Ni possess small grain sizes and uncontrollable layer numbers, but on the
other hand, high-quality monolayered graphene films have been produced on Cu.
Therefore, the two mechanisms should be different. It has been proposed that
CVD of graphene on Ni, which has high carbon solubility (>0.1 at.%),
proceeds via surface segregation followed by precipitation. In addition, a fast
cooling rate is required to suppress the growth of multiple-layered graphene.
Owing to the ultralow solubility of carbon in Cu (<0.001 at.%), fabrication
of graphene on Cu should not involve C precipitation, but is rather attributed
to surface adsorption. According to equilibrium phase diagram of the Ge-C system,
the constituents in the Ge-C alloy are immiscible under equilibrium in the bulk
(Supplementary Figure S3). This is similar as the Cu-C system which is known to
be mutually immiscible in both the solid and liquid states.
Moreover, unlike the case involving Ni, the properties of the graphene films
produced on Ge are the same regardless of whether a fast-cooling process or
slow-cooling process is adopted (Supplementary Figure S4). Hence, on account of
the negligible carbon solubility in bulk Ge (<0.1 at.%), it is suggested
that it is also a self-limiting and surface-mediated process similar to
Cu-catalyzed growth of graphene.
To
determine the transport properties of the synthesized graphene films,
back-gated graphene field effect transistors (GFETs) were fabricated on
300 nm SiO2/Si substrates,
as shown in the inset of Figure 5(a). Figure 5(a) also shows the
highly reproducible transfer characteristics (IDS-VG) of
the GFETs measured at room temperature under ambient conditions. The typical IDS-VG curve
measured at a VDS of 100 mV shows that the gate can cause
either hole or electron conduction. The V-shaped ambipolar transfer
characteristic is typical of monolayered graphene with a zero bandgap.
The Dirac point of the GFETs shifts slightly to a positive gate at VG ~
5 V, demonstrating light p-type hole doping performance. According to the
two slopes of the linear regions on both sides of the V-shaped curve, the hole
mobility is μh ~ 900 cm2V−1s−1 and
the electron mobility is μe ~ 800 cm2V−1s−1,
both of which are comparable to values reported recently from transferred CVD
graphene.
The presence of defects, wrinkles, and overlaps generated from the transfer
process may degrade the performance of GFETs (Supplementary Figure S5(a) and
(b)) thus underestimating the carrier mobility of the synthesized graphene
film. In the output characteristics of the GFETs (Figure 5(c)), the linear IDS-VDS behavior
indicates a good ohmic contact between the Ti/Au contact and graphene channels.
In addition, IDS increases with deceasing VG from
0 to −30 V and it is indicative of p-type behavior as well. The electrical
transport data also reveal that the graphene deposited on Ge is of good quality
which can be further improved by refining the deposition process.
Figure 5: Electrical properties of graphene transferred from Ge to SiO2/Si
substrate.
(a) DS-VG curves
of graphene transistors at VDS =
100 mV. The insert shows the SEM image of a back-gated GFET. (b) IDS-VDS curves
of graphene transistors at different VG.
In this
work, we have developed a facile synthesis method for large-scale and high-quality
graphene directly on Ge substrates by APCVD which conclusively certifies that
semi-metal Ge has very effective catalytic ability for direct fabrication of
graphene. Parametric studies show that the superior quality and homogeneous
monolayer graphene in large scale can been achieved on Ge substrates directly
with the optimal growth conditions. On the basis of these results, we propose a
self-limiting mechanism for graphene growth on Ge substrate, which is an
analogue of graphene on Cu foil due to extremly low carbon solubility. The
obtained GOG substrate is scalable and compatible with the mainstream
microelectronics technology, thus paving the way to the application of graphene
in microelectronic field.
Methods
CVD growth of graphene
The graphene films were grown on Ge
substrate by an APCVD method. Graphene sample was prepared with H2:CH4= 50:0.1 sccm at the growth
temperature of 910°C for 100 min. After growth, the methane (CH4) gas and the furnace were turned off, and the
furnace was cooled down to room temperature under the same flow rates of H2and
Ar at the growth stage. Further experimental details are described in theSupplementary Information.
Transferring the graphene
films to the target substrates
After the APCVD process, graphene
film was transferred by a PMMA-assisted wet-transfer method. The graphene/PMMA
film was transferred into water by etching the Ge substrate. After the removal
of the PMMA film in acetone, the film can be transferred to any substrate for
analysis and characterization subsequently. Further experimental details are
described in theSupplementary
Information.
Characterization
Raman spectra (HORIBA Jobin Yvon
HR800) were obtained using a Ar+laser
with a wavelength of 514 nm and a spot size of 1 μm. The spectra
were recorded with a 600 lines/mm grating. Transmission electron
microscopy (TEM, FET-Tecnai G2F20 S-7WIN) is utilized to ascertain
crystallographic information and also to determine the number of graphene
layers. Electrical measurements were performed in ambient condition using
Agilent (B1500A) semiconductor parameter analyzer. On quartz slides, optical transmittance
spectra were collected in a UV solution u-4100 spectrophotometer. Transmittance
properties were measured using a wavelength of 550 nm. The AFM images of
graphene transferred onto the 300 nm SiO2/Si
were taken with a Bruker(Icon). The scanning electron microscopy image of GFETs
was taken with HITAGHT S-3400N microscope. Source:Gang Wang, Miao
Zhang If you
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Substrate, please visit our website:http://www.germaniumwafers.com/, send us email at powerwaymaterial@gmail.com.
The Kelvin method and
Auger effect have been used to study the efficiency of thermal annealingin
situunder H2at 350 and 650 °C of germanium substrates, chemically etched with CP4and HNO3-HF, for use in
multicolor solar cells. This is done by specifying the state of the surface and
evaluating the impurities localized on it. The work functions of two samples,
differently etched and annealed, are also plotted. The surface analyses are
performed before and after annealing at the chosen temperatures.
The results obtained show that thermal annealing at such temperatures
(350 and 650 °C) has the advantage of increasing the work functions of the
samples, making them uniform across the surface, and reducing impurity
concentration on the surface of the samples. However, an oxide layer occurs on
the surfaces after annealing (especially after annealing at 650 °C) which
results in a surface defect in the form of a broken region in the work function.
Source:Solar
Cells If
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germanium substrate for use in thin film multicolor solar cells, please visit
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