New developments and device performance requirements in microelectronics industry add to the challenges in chemical mechanical planarization (CMP) process. One of the recently introduced materials to semiconductor manufacturing is germanium which enables improved device performance through better channel mobility in shallow trench isolation (STI) applications for advanced circuits. This paper focuses on controlling germanium/silica selectivity for advanced STI CMP applications through slurry modification by surface active agents. Surface adsorption characteristics of cationic and anionic surfactants on germanium and silica wafers are analyzed in order to control selectivity as well as the defectivity performance of the CMP applications. The effects of surfactant charge and concentration (up to self-assembly) are studied in terms of slurry stability, material removal rates and surface defectivity. Surface charge manipulation by the surfactant adsorption on the germanium surface is presented as the main criteria on the selection of the proper surfactant/oxidizer systems for CMP. The outlined correlations are systematically presented to highlight slurry modification criteria for the desired selectivity results. Consequently, the paper evaluates the slurry selectivity control and improvement criteria for the new materials introduced to microelectronics applications with CMP requirement by evaluating the germanium silica system as a model application.
Source:IOPscience
Poly-crystalline Silicon-Germanium is a promising structural material for post-processing Micro Electro-Mechanical Systems (MEMS) above CMOS due to its excellent mechanical and electrical properties when deposited at CMOS compatible temperatures. In this work we demonstrate a technique of removing unwanted interfacial (silicon-) germanium oxide layers that form on the surface of SiGe depositions as soon as the wafers are removed from the deposition chamber and exposed to an O2 ambient.
Source:IOPscience
High quality local Germanium-on-oxide (GeOI) wafers are fabricated using selective lateral germanium (Ge) growth technique by a single wafer reduced pressure chemical vapor deposition system. Mesa structures of 300 nm thick epitaxial silicon (Si) interposed by SiO2 cap and buried oxide are prepared. HCl vapor phase etching of Si is performed prior to selective Ge growth to remove a part of the epitaxial Si to form cavity under the mesa. By following selective Ge growth, the cavity was filled. Cross section TEM shows dislocations of Ge which are located near Si / Ge interface only. This mechanism is similar to aspect-ratio-trapping but here we are using a horizontal approach, which offers the option to remove the defective areas by standard structuring techniques. By plan view TEM it is shown, that the dislocations in Ge which direct to SiO2 cap or to buried-oxide (BOX) are located near the interface of Si and Ge. The dislocations which run parallel to BOX are observed only in [110] or equivalent direction. The resulting Ge grown toward [010] direction contains no dislocations. A root mean square of roughness of ~0.2 nm is obtained after the SiO2 cap removal. Tensile strain in the Ge layer is observed due to higher thermal expansion coefficient of Ge compared to Si and SiO2.
Source:IOPscience